Part Number Hot Search : 
PT239610 LN387GPX 1040305 ADG433BN G2305A A87VSYZF 23C3234 TS1082CZ
Product Description
Full Text Search
 

To Download TA8435HHQ Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 TA8435H/HQ
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC
TA8435H/HQ
PWM CHOPPER-TYPE BIPOLAR STEPPING MOTOR DRIVER.
The TA8435H/HQ is a PWM chopper-type sinusoidal micro-step bipolar stepping motor driver. Sinusoidal micro-step operation is achieved using only a clock signal input by means of built-in hardware.
FEATURES
Single-chip bipolar sinusoidal micro-step stepping motor driver Output current up to 1.5 A (AVE.) and 2.5 A (PEAK) PWM chopper-type Structured by high voltage Bi-CMOS process technology Forward and reverse rotation are available 2-, 1-2-, W1-2-, and 2W1-2-phase modes, and one- or two-clock drives can be selected. Package: HZIP25-P Input pull-up resistor equipped with RESET pin: R = 100 k (typ.) Output monitor available with MO IO ( MO ) = 2 mA (MAX.) Equipped with RESET and ENABLE pins. Weight: 9.86 g (typ.)
TA8435HQ: The TA8435HQ is a Sn-Ag plated product that includes Pb. The following conditions apply to solderability: *Solderability 1. Use of Sn-37 Pb solder bath *solder bath temperature = 230C *dipping time = 5 seconds *number of times = once *use of R-type flux 2. Use of Sn-3.0Ag-0.5Cu solder bath *solder bath temperature = 245C *dipping time = 5 seconds *number of times = once *use of R-type flux
1
2006-3-2
TA8435H/HQ
BLOCK DIAGRAM
2
2006-3-2
TA8435H/HQ
PIN CONNECTION (top view)
Note:
NC: No connection
3
2006-3-2
TA8435H/HQ
PIN FUNCTION
PIN No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 SYMBOL SG RESET ENABLE OSC CW / CCW CK2 CK1 M1 M2 REF IN Signal GND L : RESET L : ENABLE, H: OFF Chopping oscillation is determined by the external capacitor Forward / Reverse switching terminal. Clock input terminal. Clock input terminal. Excitation control input Excitation control input VNF control input Monitor output No connection. Voltage supply for logic. No connection. Output power supply terminal. Output B Power GND. B-ch output current detection terminal. Output B Output A A-ch output current detection terminal. Power GND Output A Output power supply terminal. No connection FUNCTIONAL DESCRIPTION
MO
NC VCC NC VMB B PG-B NFB B A NFA PG-A A VMA NC
4
2006-3-2
TA8435H/HQ
OUTPUT CIRCUIT
INPUT CIRCUIT
CK1, CK2, CW / CCW, M1, M2, REF IN: Terminals
RESET , ENABLE : Terminals
OSC: Terminal
Equipped with 100 k of pull-up resistance.
5
2006-3-2
TA8435H/HQ
OSCILLATOR FREQUENCY CALCULATION
The sawtooth oscillator (OSC) circuit consists of Q1 through Q4 and R1 through R4. Q2 is turned off when VOSC is less than the voltage of 2.5 V + VBE (Q2), a value that is approximately equal to 2.85 V. VOSC is increased by COSC charging through R1. Q3 and Q4 are turned on when VOSC becomes 2.85 V (High level.) The Low level of V (4) pin is equal to VBE(Q2) + V(SAT)(Q4), which is approximately equal to 1.4 V. VOSC is calculated by following equation:
1 VOSC = 5* 1 - exp - C OSC *R 1
------------------- (1).
Assuming that VOSC = 1.4 V (t = t1) and = 2.85 V (t = t2), and given that COSC is the external capacitance connected to pin (4) and R1 is an on-chip 10 k resistor, the OSC frequency is calculated as follows:
t1 = - COSC* R 1* l n ( 1 -
1.4 ) ---------------------- (2), 5
2.85 ) -------------------- (3), 5
t2 = - COSC* R 1* l n ( 1 -
fOSC =
1 1 = 1.4 2.85 t2 - t1 C ) - R 1* l n ( 1 - )) OSC (R 1* l n ( 1 - 5 5
1 (kHz)(COSC : F) . 5.15*COSC
=
6
2006-3-2
TA8435H/HQ
ENABLE AND RESET FUNCTION AND MO SIGNAL
Figure 1:
1-2 phase drive mode (M1: H, M2: L)
The ENABLE signal at High level disables only the output signals. Internal logic functions proceed in accordance with input clock signals and without regard to the ENABLE signal. Therefore output current is initiated by the timing of the internal logic circuit after release of disable mode. Figure 1 shows the ENABLE functions for when 1-2 phase drive is selected for the system.
Figure 2:
1-2 phase drive mode (M1: H, M2: L)
The RESET signal at Low level not only turns off the output signals but also stops the internal clock functions, while MO (Monitor Output) signals are set to low. Output signals are initiated from the initial point after release of RESET (High), as shown in Figure 2. MO signals can be used as rotation and initial signals for stable rotation checking.
7
2006-3-2
TA8435H/HQ
FUNCTION
INPUT CK1 CK2 CW / CCW
INITIAL MODE
RESET H H H H H H H H L X ENABLE L L L L L L L L L H CW INHIBIT CCW INHIBIT CCW INHIBIT CW INHIBIT RESET Z (Note) (Note) (Note) (Note) MODE EXCITATION MODE 2-Phase 1-2- Phase W1-2-Phase 2W1-2-Phase A PHASE CURRENT 100% 100% 100% 100% B PHASE CURRENT -100% 0% 0% 0%
H L H L H L H L X X X X
L L L L H H H H X X
Z: High Impedance X: Don't Care
INPUT M1 L H L H M2 L L H H
MODE (EXCITATION) 2-Phase 1-2-Phase W1-2-Phase 2W1-2-Phase
2-PHASE EXCITATION
(M1: L, M2: L, CW MODE)
1-2-PHASE EXCITATION
(M1: H, M2: L, CW MODE)
8
2006-3-2
TA8435H/HQ
W1-2-PHASE EXCITATION (M1: L, M2: H, CW MODE)
9
2006-3-2
TA8435H/HQ
2W1-2-PHASE EXCITATION (M1: H, M2: H, CW MODE)
10
2006-3-2
TA8435H/HQ
ABSOLUTE MAXIMUM RATINGS (Ta = 25C)
CHARACTERISTIC Supply Voltage Output Voltage Output Current MO Output Current Input Voltage Power Dissipation Operating Temperature Storage Temperature Feed Back Voltage PEAK AVE SYMBOL VCC VM IO (PEAK) IO (AVE.) IO ( MO ) VIN PD Topr Tstg VNF RATING 5.5 40 2.5 1.5 2 ~VCC 5 (Note 1) 43 (Note 2) -40~85 -55~150 1.0 UNIT V V A mA V W C C V
Note 1: No heat sink Note 2: Tc = 85C
RECOMMENDED OPERATING CONDITIONS (Ta = -20~75C)
CHARACTERISTIC Supply Voltage Output Voltage Output Current Input Voltage Clock Frequency OSC Frequency SYMBOL VCC VM IOUT VIN fCK fOSC TEST CONDITION MIN 4.5 21.6 15 TYP. 5.0 24 MAX 5.5 26.4 1.5 VCC 5 80 UNIT
V
V A V kHz kHz
11
2006-3-2
TA8435H/HQ
ELECTRICAL CHARACTERISTICS (Ta = 25C, VCC = 5 V, VM = 24 V)
CHARACTERISTIC High Input Voltage Low Input Hysteresis Voltage VIN (L) VH IIN-1 (H) Input Current IIN-1 (L) IIN-2 (L) ICC1 1 M1, M2, REF IN, VIN = 5.0 V RESET , ENABLE , VIN = 0 V INTERNAL PULL-UP RESISTOR SOURCE TYPE, VIN = 0 V Output Open, RESET (2, 1-2 phase excitation) Quiescent Current VCC Terminal 1 Output Open, RESET ENABLE RESET : L, ENABLE : H RESET : H, ENABLE : H 3 REF IN H Output Open REF IN L Output Open IOH = -40 A IOL = 40 A COSC = 0.0033 F B / A, COSC = 0.0033 F, RNF = 0.8 VNF (L) / VNF (H) COSC = 0.0033 F, RNF = 0.8 SOURCE TYPE :H :L 10 18 mA :H 10 18 SYMBOL VIN (H) 1 TEST CIR- CUIT TEST CONDITION MIN 3.5 GND -0.4 10 TYP. 600 50 MAX VCC + 0.4 1.5 100 100 100 mV nA A nA UNIT
M1, M2, CW / CCW, REF IN ENABLE , CK1, CK2
RESET
V
ENABLE : L
ICC2
(W1-2, 2W1-2 phase excitation) ICC3 ICC4 Comparator Reference Voltage Output Differential VNF (H) - VNF (L) NF Terminal Current Maximum OSC Frequency Minimum OSC Frequency OSC Frequency Minimum Clock Pulse Width Output Voltage High Low VNF (H) VNF (L) VO VNF INF fOSC (MAX.) fOSC (MIN.) fOSC tW (CK) VOH ( MO ) VOL (MO) 0.72 (Note) 0.45 -10 56 100 25 4.5 GND 0.5 63 170 44 1.0 4.9 0.1 0.55 10 70 10 62 VCC 0.5 % % A kHz kHz kHz s V 5 5 0.8 0.88 V
Note:
2-phase excitation, RNF = 0.7 , COSC = 0.0033 F
12
2006-3-2
TA8435H/HQ
OUTPUT BLOCK
CHARACTERISTIC Upper Side Lower Side Output Saturation Voltage Upper Side Lower Side Upper Side Lower Side Upper Side Diode Forward Voltage Lower Side Upper Side Lower Side SYMBOL VSAT U1 VSAT L1 VSAT U2 VSAT L2 VSAT U3 VSAT L3 VF U1 VF L1 VF U2 VF L2 IM1 Output Dark Current (A + B Channels) IM2
2W1-2 W1-2 1-2 2W1-2
TEST CIR- CUIT
TEST CONDITION
MIN
TYP. 2.1 1.3 1.8 1.1 2.5 1.8 2.0 1.5 2.5 1.8
MAX 2.8 2.0 2.2 1.5 3.0 2.2 3.0 2.1 3.3 2.5 50
UNIT
IOUT = 1.5 A
4
IOUT = 0.8 A IOUT = 2.5 A Pulse width 30 ms IOUT = 1.5 A
V
5
IOUT = 2.5 A Pulse width 30 ms ENABLE : "H" Level, Output Open
V
A
2
RESET :
"L" Level REF IN : H RNF = 0.8 COSC = 0.0033 F 86 78 66.4 50.5 35 15 8 100 100 91 83 71.4 55.5 40 20 100 15 96 88 76.4 60.5 45 25 % mA
ENABLE : "L" Level Output Open RESET : =0 =1/8 =2/8 =3/8 "H" Level

2W1-2 W1-2
2W1-2 A-B Chopping 2W1-2 W1-2 1-2 Current 2W1-2 (Note) 2W1-2 W1-2 2W1-2
VECTOR
=4/8 =5/8 =6/8 =7/8

2 Phase Excitation Mode VECTOR
Note:
Maximum current ( = 0): 100% 2W1-2 : 2W1-2-phase excitation mode W1-2 : W1-2-phase excitation mode 1-2 : 1-2-phase excitation mode
13
2006-3-2
TA8435H/HQ
TEST CIR- CUIT =0 =1/8 =2/8 =3/8 VECTOR =4/8 =5/8 =6/8 =7/8 = 0 / 8 - 1 / 8 = 1 / 8 - 2 / 8 = 2 / 8 - 3 / 8 Feed Back Voltage Step VNF = 3 / 8 - 4 / 8 = 4 / 8 - 5 / 8 = 5 / 8 - 6 / 8 = 6 / 8 - 7 / 8 tr tf tpLH tpHL Output Tr Switching Characteristics tpLH tpHL tpLH tpHL tpLH tpHL Output Leakage Current Upper Side Lower Side IOH IOL 6 7 RL = 2 , VNF = 0 V, CL = 15 pF CK~Output REF IN : H RNF = 0.8 COSC = 0.0033 F REF IN : H RNF = 0.8 COSC = 0.0033 F
CHARACTERISTIC
2W1-2 2W1-2 2W1-2 W1-2 1-2
SYMBOL
TEST CONDITION
MIN 86 78 66.4 50.5 35 15 32 24 53 87 84 120
TYP. 100 100 91 83 71.4 55.5 40 20 100 0 72 64 93 127 124 160 0.3 2.2 1.5 2.7 5.4 6.3 2.0 2.5 5.0 6.0
MAX 96 88 76.4 60.5 45 25 112 104 133 167 164 200 50 50
UNIT
W1-2

A-B Chopping Current (Note)
2W1-2 2W1-2 2W1-2 2W1-2 2W1-2
W1-2 1-2
%
W1-2

2 Phase Excitation Mode VECTOR
mV
OSC~Output
s
RESET ~Output
ENABLE ~Output
VM = 30 V
A
Note:
Maximum current ( = 0): 100% 2W1-2 : 2W1-2-phase excitation mode W1-2 : W1-2-phase excitation mode 1-2 : 1-2-phase excitation mode
14
2006-3-2
TA8435H/HQ
TEST CIRCUIT 1
VIN (H), (L), IIN (H), (L)
TA8435H/HQ
TEST CIRCUIT 2
ICC, IM
TA8435H/HQ
15
2006-3-2
TA8435H/HQ
TEST CIRCUIT 3
VNF (H), (L)
TA8435H/HQ
TEST CIRCUIT 4
VCE (SAT) UPPER SIDE, LOWER SIDE
TA8435H/HQ
Note:
Calibrate Io to 1.5 A / 0.8 A by RL
16
2006-3-2
TA8435H/HQ
TEST CIRCUIT 5
VFU, VFL
TA8435H/HQ
TEST CIRCUIT 6
IOH, IOL
TA8435H/HQ
17
2006-3-2
TA8435H/HQ
AC ELECTRICAL CHARACTERISTICS, MEASUREMENT WAVE
CK (OSC)-OUT
18
2006-3-2
TA8435H/HQ
OUTPUT CURRENT VECTOR ORBIT (normalized to 90 per step)
0 1 2 3 4 5 6 7 8
ROTATION ANGLE IDEAL 0 11.25 22.5 33.75 45 56.25 67.5 78.75 90 TA8435H/HQ 0 11.31 23.73 33.77 45 56.23 66.27 78.69 90 IDEAL 100 100 100 100 100 100 100 100 100
VECTOR LENGTH TA8435H/HQ 100.00 101.98 99.40 99.85 100.97 99.85 99.40 101.98 100.00 141.42 2-Phase
1-2 / W1-2 / 2W1-2-Phase
19
2006-3-2
TA8435H/HQ
APPLICATION CIRCUIT
Note 1: A Schottky diode (3GWJ42) for preventing punch-through current should also be connected between each output (pin 16 / 19 / 20 / 23). Note 2: The GND pattern should be laid out at one point to prevent common impedance. Note 3: A capacitor for noise suppression should be connected between the power supply (VCC, VM) and GND to stabilize operation. Note 4: Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed by short-circuiting between outputs, air contamination faults, or faults due to improper grounding, or by short-circuiting between contiguous pins.
TA8435H/HQ
20
2006-3-2
TA8435H/HQ
When using TA8435H/HQ
0. Introduction
The TA8435H/HQ controls the PWM to set the stepping motor winding current to a constant current. The device is a micro-step driver IC used to drive the stepping motor efficiently at low vibration.
1.
Micro-step drive
The TA8435H/HQ drives the stepping motor in micro steps with a maximum resolution of 1/8 of the 2-phase stepping angle (in 2W1-2-phase mode). In micro step operation, A-phase and B-phase current levels are set inside the IC so that the composite vector size and the rotation angle are even. Just inputting clock signals rotates the stepping motor in micro steps.
2.
PWM control and output current setting
(1) Output current path (PWM control) The TA8435H/HQ controls the PWM by turning the upper power transistor on and off. Here, current flows as shown in the figure below.
(2)
Setting of output current by REF-IN input and current detection resistor The motor current (maximum current for micro-step drive) IO is set as shown in the following equation, using REF-IN input and the external current detection resistor RNF.
IO = VREF / RNF where, REF-IN = High, REF-IN = Low,
VREF = 0.8 V VREF = 0.5 V
21
2006-3-2
TA8435H/HQ
3. Logic control
(1) Clock input for rotation direction control To switch rotation between forward and reverse, there are two types of clock input: one-clock input and two-clock input. (a) One-clock input One clock pin, CK1 or CK2, is used for clock input. In this case, rotation is switched between forward or reverse using a CW or CCW signal.
(b)
Two-clock input Both clock pins, CK1 and CK2, are used for clock input. Switching between CK1 and CK2 controls forward and reverse rotation.

22
2006-3-2
TA8435H/HQ
(2) Mode setting Setting M1 and M2 selects one of the following modes: 2-phase, 1-2-phase, W1-2-phase, and 2W1-2-phase modes. Monitor ( MO ) output The product supports the use of monitor output to monitor the current waveform location. For 2-phase mode, the MO output is Low if the timing of the A-phase current = 100% and that of the B-phase current = -100%. For 1-2-phase, W1-2-phase, or 2W1-2-phase mode, the MO output is Low if the timing of the A-phase current = 100% and and that of the B-phase current = 0%. Reset pin The product supports the use of reset input to reset the internal counter. Setting RESET to Low resets the internal counter, forcing the output current to the same value as that when the MO output is Low. Phase mode switching To avoid step changing during motor rotation, the current must not fluctuate at phase mode switching. Pay attention to the following points.
(3)
(4)
(5)
(a) During switching between 2-phase and other phase modes, the current fluctuates. (b) When switching between phase modes other than 2-phase, the current can be switched without fluctuation if the timing of MO output = Low. However, when switching as follows, set RESET to Low beforehand: from 1-2-phase to W1-2-phase or 2W1-2-phase mode; from W1-2-phase to 2W1-2-phase mode.

23
2006-3-2
TA8435H/HQ
4. PWM oscillation frequency (external capacitor setting)
An external capacitor connected to the OSC pin is used to generate internally a sawtooth waveform. PWM is controlled using this frequency. Toshiba recommend 3300 pF for the capacitance, taking variations between ICs into consideration.
5.
External Schottky diode
A parasitic diode can be supported on the lower side of the output. When PWM is controlled, current flows to this parasitic diode. Unfortunately, this current has the effect of generating punch-through current and micro-step waveform fluctuation. For this reason, be sure to connect a Schottky barrier diode externally. This external diode can also reduce heat generated in the IC.
6.
Power dissipation
The IC power dissipation is determined by the following equation (where the Schottky diode is connected between the output pin and GND): P = VCC x ICC + VM x IM + IO (tON x VSAT-U + VSAT-L) tON = TON / TS (PWM control ON duty). The higher the ambient temperature, the smaller the power dissipation. Check the PD-Ta curve, and be sure to design the heat dissipation with a sufficient margin.
7.
Heatsink fin processing
The IC fin (rear) is electrically connected to the rear of the chip. When current flows to the fin, the IC malfunctions. If there is any possibility of a voltage being generated between the IC GND and the fin, either ground the fin or insulate it.
24
2006-3-2
TA8435H/HQ
PACKAGE DIMENSIONS
HZIP25-P-1.27 Unit: mm
Weight: 9.86 g (typ.)
25
2006-3-2
TA8435H/HQ
Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. Timing charts may be simplified for explanatory purposes. The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
2. Equivalent Circuits
3. Timing Charts
4. Application Circuits
5. Test Circuits
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. [4] Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
26
2006-3-2
TA8435H/HQ
Points to remember on handling of ICs
(1) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (2) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor's power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device's motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design.
27
2006-3-2
TA8435H/HQ
28
2006-3-2


▲Up To Search▲   

 
Price & Availability of TA8435HHQ

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X